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A Materials Platform for Next-Generation Computing and Communications
Carbon nanotube wafers are functional wafers engineered through the advanced dispersion, self-assembly, transfer, and patterning of high-purity, highly aligned semiconducting carbon nanotubes. Serving as foundational materials for the carbon-based semiconductor industry in the Beyond Moore era, they provide a new paradigm to break through traditional silicon bottlenecks, enabled by their ultra-high carrier mobility, intrinsic nanoscale dimensions, and seamless CMOS compatibility.
Through subsequent lithography, etching, thin-film deposition, and integration processes, carbon nanotube wafers can be fabricated into a series of high-performance electronic devices and chips, including carbon nanotube transistors, CNT 3D capacitors, high-frequency/RF devices, and advanced node integrated circuits. Inherently featuring high speed, low power consumption, and high frequency, these devices primarily serve pioneering fields with stringent requirements for compute performance, energy efficiency, and operating frequency:
High-Performance ComputingDelivering foundational compute support for next-generation data centers and AI acceleration chips.
High-Frequency CommunicationsApplied in core RF components within 5G/6G communications, millimeter-wave radar, and terahertz technologies.
Low-Power AI ChipsSignificantly enhancing interconnect density, increasing AI computing bandwidth, and reducing operational power consumption through monolithic 3D heterogeneous integration.
A carbon nanotube forest is a macroscopic three-dimensional array structure composed of a vast number of carbon nanotubes grown vertically on a substrate.
Excellent Electrical Performance & Electromigration ResistancePreventing electromigration failures caused by high current densities in VLSI (Very Large Scale Integration).
Low-Temperature CMOS Process CompatibilityEnabling the growth of high-density forests below 400°C to meet BEOL (Back-End-Of-Line) thermal budget constraints.
High Thermal Conductivity & Matching Coefficient of Thermal Expansion (CTE)The theoretical axial thermal conductivity of a single nanotube reaches up to 6,600 W/m·K, with a CTE close to silicon (approx. 4.3 ppm/K). This significantly mitigates thermal stress and prevents device delamination.
High Specific Surface Area & Tip Field EnhancementThe porous structure provides a high specific surface area, while the tips exhibit a powerful electric field enhancement effect, supporting high-sensitivity sensing and highly efficient electron emission.
Advanced Through-Silicon Via (TSV) FillingUtilized in 3D stacked chips to minimize signal latency, enhance thermal stability, and reduce stress on the silicon substrate.
Next-Generation Chip InterconnectsReplacing copper interconnects at nodes below 16nm to construct vertical and horizontal interconnects with low resistance and extended operating lifetimes.
3D High-Density CapacitorsActing as capacitor electrodes to provide an ultra-high specific surface area, thereby maximizing capacitance.
Field Emission Devices & Vacuum MicroelectronicsServing as an outstanding field-emission cold cathode material for devices such as miniature X-ray sources and field emission displays, achieving high brightness and rapid response times.
Carbon nanotube crystal round technology challenge, one click docking professional solution.
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