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+86 512 6258 0966
+86 180 0621 8012
+86 180 0621 8012
Translating material potential into product advancement
Addressing the core bottleneck of the "memory wall" caused by the growth of AI Compute, carbon-based monolithic 3D (M3D) integrated chips directly stack multiple layers of logic and memory vertically on a silicon substrate using low-temperature carbon nanotube processes. This shortens data transport distances to the micrometer scale, enabling near-memory computing. This architectural transformation has been validated by prototypes, delivering a measured performance boost of over 4x and a system energy efficiency potential of over a hundredfold.
10,000x Interconnect DensityEmploying nanoscale vertical vias, the interconnect density exceeds 10⁷/mm², which is over 10,000 times that of traditional technologies.
Low-Temperature Manufacturing FoundationThe process temperature of carbon nanotube transistors is ≤ 415 °C, compatible with existing production lines and ensuring the feasibility of multi-layer stacking.
Three-Layer Heterogeneous IntegrationIntegrating silicon-based CMOS (computing), RRAM (memory), and CNFET (control) onto a single chip.
Training and inference for DNN workloads, including CNNs (e.g., ResNet) and LSTM language models.
Processing complex graph algorithms such as PageRank and Connected Components, as well as various big data analytics.
Applied to manufacturing high-density 3D Flash (e.g., BiCS Flash), 3D RRAM, 3D DRAM, and 3D SRAM.
Applicable to smartphone SoCs, programmable logic devices (3D-FPGA), and edge computing nodes.
Carbon nanotube crystal round technology challenge, one click docking professional solution.
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Tel:+86 180 0621 8012
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